1. Field of the Invention
This invention relates to a collimator for use in sputter deposition of films on semiconductor wafers, and a method for using the same. More specifically, the invention relates to the use of a collimator at a free-floating electrical potential, preferably in combination with a negative bias to the wafer, for enhanced step coverage of the wafer. In order to maintain the collimator and, optionally, lower shield at the free-floating potential in a manner suitable for effective and repeatable operation, a kit providing a modified support structure has been invented, as well as a deposition chamber so modified and a method of deposition.
2. State of the Art
Sputtering is a method of depositing thin metal and insulating films onto semiconductor wafers. The term "wafer" includes not only traditional wafer structures, but also other substrates exhibiting an outer layer of semiconductor material useful for formation of integrated circuits thereon, including without limitation so-called silicon-on-insulator, or "SOI", structures. The term sputtering describes a physical mechanism in which atoms are dislodged from the surface of a material by collision with high energy particles. Sputtering has become a widely utilized deposition technique for a variety of metallic films in semiconductor and integrated circuit (IC) fabrication, including aluminum, aluminum alloys, platinum, gold, tungsten, titanium and titanium:tungsten. Sputtering is also used in some applications to deposit molybdenum, Si, SiO.sub.2 (silica glass), and refractory metal silicides, although CVD (chemical vapor deposition) or evaporation may be more frequently used for deposition of such materials.
Sputtering takes place in an evacuated chamber. In general, the sputtering process may be summarized in four steps: 1) ions are generated and directed at a target; 2) the ions sputter (dislodge) target atoms; 3) the ejected (sputtered) atoms are transported to the substrate, where 4) they condense and form a thin film.
The energetic particles used to strike target materials to be sputtered in sputter deposition systems are generated by glow-discharges, a glow-discharge being a self-sustaining type of plasma. A plasma may be defined as a partially ionized gas containing an equal number of positive and negative charges, as well as some other number of non-ionized gas particles. Generally, a noble gas, usually argon (although at least neon and xenon have also been employed) comprises the plasma.
One drawback of sputtering is the difficulty in achieving conformal coverage deep within high aspect ratio features on semiconductor wafers. In sputtering, the trajectory of the atomic material sputtered from the target depends in significant part upon the incident angle of the bombarding atom. Accordingly, atoms directed towards the wafer surface come from varying angles, only a relatively small portion of which arrive at the wafer surface in a substantially perpendicular angle in comparison to the other angled atoms. Atoms reaching the substrate surface via non-perpendicular trajectories provide an undesired drawback of not conformally coating deep within high aspect ratio features.
To overcome such a drawback, a device known as a collimator is used. A collimator typically comprises a disk-shaped object having a plurality of holes or openings provided therethrough. The collimator functions effectively as a filter, essentially restricting the path of the sputtered particles to the desired perpendicular or near-perpendicular and allowing only these particles to pass through the collimator and coat the substrate surface, which is normally a semiconductor wafer. This path restriction to substantially perpendicular angled particles results in a more conformal deposition within high aspect ratio features than is possible when a collimator is not used.
Another method used to improve step coverage within contacts is to increase the acceleration of ions from the discharge toward their surfaces. The impinging ions transfer energy to surface atoms, and cause them to be transported to the sidewalls of steps, where they accumulate and locally increase film thickness.
One aspect of the use of a prior art collimator is that it is mounted in a sputter chamber in such a manner that the collimator and the chamber are both grounded. This grounded configuration causes the collimator to behave as a plasma barrier in both directions. The parent and grand-parent applications hereto disclose apparatus and method of using the same that allow improved conformal coverage deep within high aspect ratio features on semiconductor wafers and IC's. This result was achieved by providing a collimator and method of using the same wherein the collimator is not an electrical plasma barrier.
The parent and grand-parent application hereto also disclose the use of an rf bias to the substrate (wafer) for enhanced attraction of plasma ions for reactive sputtering as well as control or inhibition of "pinch off" of high aspect ratio features by the deposited film of target material, wherein material deposited at the upper extent of recessed features effectively precludes coverage of the bottoms thereof.
As taught by the referenced prior applications, a collimator is mounted within a sputter chamber and is interposed between a sputter target and a semiconductor wafer to be coated with a thin film of the sputtered material. The collimator is mounted within the sputter chamber in an insulated manner so that the collimator is electrically isolated from the chamber and the collimator is able to take on a floating electrical potential of or associated with the potential of the plasma generated within the sputter chamber.
In practicing the above-referenced invention, however, the inventor herein has recognized that it is difficult to provide a collimator isolator structure which is robust enough to withstand repeated sputtering operations without shorting and without accumulating deposits of target material in undesired areas between the source and the collimator. In addition, the inventor has recognized the merits of extending electrical isolation of the collimator to the shield below the collimator located between the collimator and the wafer), in contrast to the grounded lower shields of the prior art.